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| SLS System Logic Semiconductor SL70D0948 48 OUTPUT LED DRIVER / 9 BIT PWM CONTROLLER SL70D0948 System Logic Semiconductor SLS System Logic Semiconductor SL70D0948 CONTENTS INTRODUCTION BLOCK DIAGRAM PIN ASSIGNMENT PIN DESCRIPTION FUNCTION DESCRIPTION SPECIFICAIONS REFERENCE APPLICATIONS SLS System Logic Semiconductor INTRODUCTION SL70D0948 The SL70D0948 is LED driver / controller IC for LED display panel. This is consisted of 48 channel LED driver , 9Bit PWM controller and 48 bit shift register. Also it is very convenient to application because all display data can transfer by serial method. FEATURES Driver Output Circuits - 48 LED Driver Outputs - LED Driving Voltage - LED Driving Current - LED Driving Current Control - Outputs are 9bit PWM controlled Data Interface - 48bit Shift Register for 9bit data input - 9bit parallel data format selectable PWM controller - 9bit PWM control ( 512 Gray scale ) - 3bit Brightness / 4bit Brightness input selectable Package Type - 100 pin MQFP : N-ch Open Drain MOS Transistor Output : Max. 16V (When Transistor Off) : Max. 90mA PWCLK BRMODE STROBE /C E 1 CE2 OE /R E S E T BRD0 BRD1 BRD2 DIN 9bit BLOCK DIAGRAM SLS System Logic Semiconductor DIN0 DIN8 9 bit PWM Counter Driver Output Control 9 9 9bit Data Register (1) 9 PWM Generator (1) PWM Generator (2) PWM Generator (3) LED Driver (3) LED Driver (2) LED Driver (1) LED1 LED2 LED3 9 9bit Data Register (2) 9 9 9bit Data Register (3) 4 8 bit x9bit Shift Register SHCLK 9 9 9bit Data Register (46) 9 PWM Generator (46) PWM Generator (47) PWM Generator (48) LED Driver (46) LED Driver (47) LED Driver (48) LED46 LED47 LED48 9 9bit Data Register (47) 9 9 9bit Data Register (48) DOUT0 DOUT8 SL70D0948 DOUT 9bit SLS System Logic Semiconductor SL70D0948 PIN ASSIGNMENT(MQFP) 80 BRMODE PWCLK LED30 LED29 LED28 LED27 LED26 LED25 LED24 LED23 LED22 LED21 LED20 LED19 BRD0 BRD1 BRD2 OEB VDD VDD VDD GND GND GND GND GND VDD /CE1 CE2 51 GND 81 STROBE SHCLK /R E S E T GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD NC VDD GND LED18 50 SL70D0948 System Logic Semiconductor DOUT0 DOUT1 DOUT2 DOUT3 DOUT4 DOUT5 DOUT6 LED43 LED44 LED45 LED46 LED47 LED48 LED1 LED2 LED3 LED4 LED5 LED6 DIN7 DIN6 DIN5 DIN4 DIN3 DIN2 DIN1 DIN0 GND GND GND LED17 LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 100 DIN8 31 1 30 SLS System Logic Semiconductor SL70D0948 PIN DESCRIPTION PIN No. (MQFP) PIN NAME FUNCTION 49,52,53,54,78,99 9, 16, 23, 33, 34, 41, 48, 59, 65, 72,74 84, 91, 98 83 VDD 5 V Power supply terminal. GND terminals for LED Drivers and control logic. GND All GND terminals must be connected to GND level. Do not left any GND terminal to NC. /R E S E T Reset input terminal (Low active). 100, 1, 2, 3, 4, 5, 6, 7, 8 DIN8 ~ DIN0 Data input terminals for 9bit R, G, B data. Shift register accepts R, G, B data from these terminals. (at rising edge of SHCLK) 32, 31, 30, 29, 28, 27, 26, 25, 24 DOUT8 ~ DOUT0 Output terminals of shift register output data for next DIN8 ~ DIN0 terminals. 82 SHCLK Shift register clock input terminal. Strobe signal input terminal. At rising edge of strobe signal, 81 STROBE 48 channels of 9 bit data registers copy R, G, B data from shift register. 80 /C E 1 Chip enable signal input terminal (Low active). Chip enable signal input terminal (High active). 79 CE2 T h e d e v i c e a c c e p t s S H C L K a n d S T R O B E w h e n / C E 1 = "L " a n d C E 2 = "H ". Output enable signal input terminal. 76 OEB T h e d e v i c e o u t p u t s d a t a w h e n O E B = "L ". W h e n O E B = "H " all R, G, B output terminals hold high-impedance state. 77 PWCLK PWM generator reference clock input terminal. 75 BRMODE Brightness control mode input terminal. 56, 57, 58 BRD2 ~ BRD0 Brightness control data input terminal. SLS System Logic Semiconductor SL70D0948 PIN DESCRIPTION PIN No. (MQFP) (continued) PIN NAME FUNCTION 51,55 GND Reserved Pin. Must be tied to GND. 50 17, 18, 19, 20, 21, 22,35 , 36, 37, 38, 39, 40, 42, 43, 44, 45 46, 47, 60, 61 62, 63, 64, 65 67, 68, 69, 70, 71, 72, 85, 86 87, 88, 89, 90 92, 93, 94, 95 96, 97, 10, 11 12, 13, 14, 15 NC No Connection LED1 ~ 48 LED driver output terminals. SLS System Logic Semiconductor SL70D0948 FUNCTION DESCRIPTION SYSTEM INTERFACE Chip Enable Input The chip enable pins are /CE1 and CE2. The SL70D0948 can enable chip by /CE1=0, and CE2=1. If the SL70D0948 is enable then it can receive signal that DIN,SHCLK and STROBE. Output Enable Input The SL70D0948 has output enable pin (OEB). If the OEB = 1, all output are off and if OEB = 0 then all output pins are PWM output. Data Input / Output The SL70D0948 has 9bit data input pins (DIN[8:0]) and 9bit data output pins (DOUT[8:0]). The output data is out after 48 times SHCLK from input data. If DOUT[8:0] pins are connected to next device DIN[8:0] pins, the first device 48bit input data can shift the next device 48bit input data by SHCLK. It can transfer display data to serial method so it makes device to connect directly. The 9bit LED input data are MSB first inputted. The 9bit input data are inputted 9bit LED1 and next 9bit LED2 and next 9bit LED3 ... LED48 input data by SHCLK. SLS System Logic Semiconductor INPUT TIMING DIAGRAM DATA INPUT SL70D0948 DIN8~DIN0 LED45 LED46 LED47 LED48 LED1 LED2 SHCLK STROBE Data Register DATA (internal) Data Register(1) LED1[8:0] Data Register(2) LED2[8:0] Data Register(3) LED3[8:0] Data Register(4) LED4[8:0] Data Register(5) LED5[8:0] Data Register(46) LED46[8:0] Data Register(47) LED47[8:0] Data Register(48) LED48[8:0] DOUT TIMING DIAGRAM DATA INPUT DIN8~DIN0 LED43[8:0] LED44[8:0] LED45[8:0] LED46[8:0] LED47[8:0] LED48[8:0] SHCLK 1 2 3 4 5 6 DATA OUTPUT SHCLK (After 48 clocks) 49 50 51 52 53 54 DOUT8~DOUT6 LED43[8:0] LED44[8:0] LED45[8:0] LED46[8:0] LED47[8:0] SLS System Logic Semiconductor SL70D0948 PWM OUTPUT WAVEFORM OUTPUT DRIVER PWCLK 8 clock = 1 T B R M O D E = 0 , B R D [ 2 : 0 ] = ( 1 1 1 )2 OUTPUT DRIVER PWCLK 8 clock = 1 T BRMODE = 0, BRD[2:0] = (0 0 0) 2 OUTPUT DRIVER PWCLK 16 clock = 1 T BRMODE = 1, BRD[2:0] = (111) 2 OUTPUT DRIVER PWCLK 9 clock = 9/16 T 16 clock = 1 T BRMODE = 1, BRD[2:0] = (0 0 0) 2 SLS System Logic Semiconductor SL70D0948 PWM OUTPUT TIMING DIAGRAM OUTPUT DRIVER 511 T 511 T DATA = (1FF)1 6 256 T 256 T OUTPUT DRIVER 511 T 511 T D A T A = ( 1 0 0 )1 6 1T 1T OUTPUT DRIVER 511 T 511 T D A T A = ( 0 0 1 )1 6 SLS System Logic Semiconductor SL70D0948 SPECIFICATIONS M A X I M U M R A T I N G S ( T a = 25 C ) CHARACTERISTIC Supply Voltage Output Voltage (LED1 ~ LED48) Output Current (LED1 ~ LED48) Input Voltage GND terminal Current SHCLK Clock Frequency PWCLK Power Dissipation Operating Temperature Storage Temperature FPWM PD TOPR TSTG 20 1.78 -40 ~85 -55 ~ 150 MHz W o o SYMBOL VDD VOUT IO U T V IN IG N D FS R RATING 0 ~ 7.0 -0.5 ~ 17 90 -0.4 ~ V D D + 0.4 1440 15 UNIT V V mA V mA MHz C C o RECOMMANDED OPERATING CONDITION (Ta = 25 C) CHARACTERISTIC Supply Voltage Output Voltage (LED1~48) LED1~ 48 Output Current SHCLK IO L Input Voltage DIN Data Setup Time DIN Data Hold Time STROBE Setup Time STROBE Hold Time Pulse Width SHCLK, PWCLK, STROBE SHCLK PWCLK V IN tD S U tD H L D tS S U tS H L D tW H tW L FS R FPWM PD 0 50 20 50 20 30 30 1.0 VDD 10 15 1.78 V ns ns ns ns ns ns MHz MHz W o SYMBOL VDD VOUT IO U T IO H CONDITION - MIN. 4.5 - TYP. 5.0 - MAX. 5.5 15.0 88 -1.0 UNIT V V mA Clock Frequency Power Dissipation SLS System Logic Semiconductor S W I T C H I N G C H A R A C T E R I S T I C S ( Ta = 25 C) CHARACTERISTIC SHCLK-DOUT Propagation Delay Time ( "L " t o "H ") OE SHCLK Maximum Clock Frequency STROBE SHCLK Minimum Pulse Width STROBE Data Set Up Time Data Hold Time Maximum Clock Rise Time Maximum Clock Fall Time Maximum Output Rise Time Maximum Output Fall Time tD S U tD H L D tR tF tO R SL70D0948 o SYMBOL CONDITION MIN. - TYP. 20 50 50 15 20 15 10 10 10 15 10 50 100 MAX. 50 100 100 20 30 20 20 20 20 30 UNIT STROBE tP L H - ns FSRMAX FPWMAX FSTMAX VDD = 5.0V 10 15 10 - PWCLK MHz VOUT = 0.4V tW H tW L VCON = V DD V IH V IL IO U T = VDD = GND = 40mA PWCLK ns FPWM = 10MHz ns 15 10 us 10 100 ns tO F 200 TIMING WAVE FORM DIN8~DIN0 tD S U tW L DIN[8:0] tD H L D SHCLK 0.1V D D tW H tR tS S U 0.9V D D tF tS H L D STROBE tP L H DOUT8~DOUT0 tP L H DOUT[8:0] LED1 ~ LED48 OUTPUT SLS System Logic Semiconductor SL70D0948 PACKAGE INFORMATION 100 PIN MQFP (14 x 20 Body) 24.15 23.65 20.1 19.9 18.15 17.65 3.10 M A X 14.1 13.9 0.38 0.22 0.65 0~78 0.36 0.10 1.03 0.73 1.95 0.23 0.13 SLS System Logic Semiconductor SL70D0948 REFERENCE APPLICATIONS Power Line Connection VDD BRMODE PWCLK LED30 LED28 LED27 LED26 LED25 LED24 LED22 LED21 LED20 LED29 LED23 LED19 BRD0 BRD1 BRD2 /CE1 OEB GND GND GND GND GND STROBE SHCLK /RESET GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD DIN8 GND VDD VDD VDD CE2 VDD NC VDD GND LED18 LED17 SL70D0948 System Logic Semiconductor LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 DOUT0 DOUT1 DOUT2 DOUT4 DOUT3 DOUT5 LED43 LED44 LED45 LED47 LED48 DOUT6 LED46 LED1 LED2 LED3 LED5 LED6 DIN7 DIN6 DIN5 DIN4 DIN3 DIN1 DIN0 GND GND LED4 DIN2 GND GND SLS System Logic Semiconductor SL70D0948 REFERENCE APPLICATIONS (continued) Data & Control Signal Connection PWCLK VDD OEB BRMODE CE PWCLK LED30 LED28 LED27 LED26 LED25 LED24 LED22 LED21 LED20 LED29 LED23 LED19 BRD0 BRD1 BRD2 /CE1 OEB GND GND GND GND GND STROBE SHCLK /R E S E T STROBE SHCLK /RESET GND LED31 LED32 LED33 LED34 LED35 LED36 GND LED37 LED38 LED39 LED40 LED41 LED42 GND VDD GND VDD VDD VDD CE2 VDD NC VDD GND LED18 LED17 SL70D0948 System Logic Semiconductor LED16 LED15 LED14 LED13 GND LED12 LED11 LED10 LED9 LED8 LED7 GND GND DOUT8 DOUT7 OUT8 OUT7 IN8 DIN8 DOUT0 DOUT1 DOUT2 DOUT4 DOUT3 DOUT5 LED43 LED44 LED45 LED47 LED48 OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0 DOUT6 LED46 LED1 LED2 LED3 LED5 LED6 DIN7 DIN6 DIN5 DIN4 DIN3 DIN1 DIN0 GND GND LED4 DIN2 GND GND Application Ex 1. BRMODE = 0 : The brightness is controlled by 8 steps such as 8/8 ~ 1/8. Power 48 L E D s 48 L E D s 48 L E D s Power Power 48 Pins LED Driver Outputs LED Driver Outputs LED Driver Outputs 48 Pins 48 Pins Controller SL70D0948 DOUT[8:0] 9bit Data DIN[8:0] SHCLK STROBE PWCLK SHCLK DIN[8:0] STROBE PWCLK DOUT[8:0] 9bit Data SLS System Logic Semiconductor REFERENCE APPLICATIONS SL70D0948 SL70D0948 DOUT[8:0] 9bit Data STROBE PWCLK 5 1 2 Gray Scale 9 bit Data 9bit Data DIN[8:0] Next Device SHCLK (continued) SHCLK STROBE Oscillator 5 ~ 20 M H z SL70D0948 Data & Control Signal Connection |
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